This invention relates to a process for the stabilization of PN junctions, and it relates, more particularely, to a hermetic passivation process involving the layering of silicon dioxide and silicon nitride.
A thorough passivation of a microwave transistor requires the application of a silicon nitride layer in the active region. Since the silicon nitride layer, for various reasons, should not be applied directly to the silicon, it is the present conventional practice to deposit the silicon nitride layer over a silicon dioxide layer, or the silicon dioxide layer is partially converted by a nitrating atmosphere into a silicon nitride layer. In all these foregoing situations, there is a double passivation layer, consisting of silicon dioxide deposited directly upon the substrate, and of silicon nitride deposited upon the silicon dioxide. This double passivation layer must be structured as a whole in a completed sequence of steps.
The present state of the processing for the structuring of a passivation double layer, consisting of silicon nitride deposited upon the silicon dioxide, is described in FIGS. 1 through 4.
FIG. 1 depicts a semiconductor substrate 1 upon which is deposited an oxide layer 2 with a silicon nitride layer 3 deposited thereon.
If, for example, it is desired to form emitter strips in PNP silicon high frequency transistors by means of the process shown in FIG. 1, the region underlying the base region is a p-type region. A thin silicon dioxide layer of, for example, 30 nm thickness can be produced thermally as an oxide layer 2. However, the silicon dioxide layer can also be deposited by means of a CVD process. For example, a 120 nm thick Si.sub.3 N.sub.4 layer can be produced as a silicon nitride layer 3. The silicon nitride layer 3 can also be produced by nitrating the oxide layer 2 in a nitrating atmosphere or by CVD depositing. A layer produced at high temperature can be used as a silicon nitride layer 3. A silicon oxinitride layer can also be used as a silicon nitride layer. After the double passivation layer has been deposited, the state of the art process typically involves structuring the silicon nitride layer 3 by means of a photolithographic process. Thereupon, the resist mask used in the photolithographic process is removed. The structure thus formed is shown in FIG. 2. After the silicon nitride layer 3 has been formed, the oxide layer 2 is structured or patterned by means of a wet chemical etching process. The result of this process is illustrated in FIG. 3.
Following the formation of the double passivation layer, next an implantation and a subsequent diffusion for producing the emitter 4 which is n-doped. The result of this procedural sequence is shown in FIG. 4.
During the wet chemical etching of the oxide 2, the oxide 2 is unavoidably undercut. This undercut of the oxide 2 produces cavities or openings in the double passivation layer, which cannot be closed through the subsequent application of state of the art processes.
During the emitter implantation, the overlapping overhanging nitride 3 produces a shading of the boundary areas of the exposed silicon, which consequently are not provided with implantation particles. Thus, during the subsequent emitter diffusion it cannot always be ensured that the emitter region 4 diffuses laterally to the underside of the oxide 2. Even when the PN junction between the emitter 4 and the subsequent p-doped region of the silicon 1 is completely covered by the oxide 2, the aforementioned cavities lead to malfunctions. These cavities can become coupled or exposed to the outside atmosphere of the electronic component and may thus function as gas conduits. As a consequence, interfering substances--in particular hydrogen--will enter the vicinity of the PN junction and thus lead to electrical instability of the electronic component.
The following process will serve to eliminate the nitride overlap: following the wet chemical etching of the oxide 2, the nitride layer 3, i.e., without being covered with resist or any other type of layer, is overetched over the entire area, until the nitride 3 only has one half of the original layer thickness. Since the overlapping nitride 3 is attacked both from the bottom and the top when the entire area is overetched, the overlap of the nitride 3 breaks off, thus preventing cavity formation. The protective nitride layer retains an adequate thickness.
However, in the application of the foregoing process, the overetching with nitride of the entire area presents a problem. Specifically, the etching of the nitride 3 produces an uneven effect, thus resulting in a varying nitride thickness. A further disadvantage is that the nitride edge always coincides with the oxide edge after the entire area has been overetched with nitride. This results in very steep abrupt change in the surface having a step height corresponding to the thickness of the nitride and oxide passivation double layer. During the subsequent metallization, very abrupt steps can increasingly lead to breaks in the metal and thus reduce operation, yield and reliability.